The speed of assembling is not really important, after all, it's much faster than parsing SEPPLES. Give'em all a try and pick the one you liked more. I'd choose FASM for the excellent documentation and a nice notepad. If you're going to do some WinAPI, MASM would be better - it has more headers and a nice mini-IDE, although you'll have to download the whole Visual Studio 2012 to obtain latest ml.exe.
Nasm. C++ Inline Asm would be the best but the operands are always the wrong fukken way around!
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Anonymous2012-08-25 9:52
MASM32 is the most advanced and mature one out there. You should use it unless you're writing your own OS (use FASM) or are stuck on Leenucks (use NASM).
>>11
There's an Intel syntax option for g++, except that you have to remember to set it back to AT&T at the end of the inline asm block because it really is a pass-through thing.
Little things like this are what prevent me from going to exclusively *nix development. The tools are there and powerful, but their implementation is often awkward. (See also: proliferation of incompatible UI libraries, huge chains of (versioned!) dependencies, no centrally managed configuration, etc.)
>>33 The register names are SP, AX, BX, CX, DX, BP, DI, and SI. Opcode names are mostly the same as those listed in the Intel manual with an L, W, or B appended to identify 32-bit, 16-bit, and 8-bit operations.
There actually is a good, sane, logical Intel assembler?
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Anonymous2012-08-27 3:03
nasm or fasm would be best to learn on. gas isn't really meant to be used independently of gcc these days, and the syntax differences, while small, will prove confusing to a beginner. Avoid masm at all costs - its macro ``syntax'' is gross even for the experienced; a novice will probably spend more time damaging their programs to accommodate the macros than they will actually learning to write for x86.
>>34
Make it even more confusing than gas by renaming all the registers, then append extra crap to the mnemonics in an attempt to fix the confusion? That's worse than gas. I don't want to know what they did with movzx/movsx.
>>37
ax and eax aren't different registers. why call them by different names when it's actually the operation being performed on the register that's different? it makes much more sense to indicate the size on the opcode name than on the register name.
>>38
Doing it any other way than what is officially specified in the manufacturer's documentation just leads to confusion. It makes much LESS sense to need to append special suffices to mnenomics when different register names would easily make the assembler able to decide.
Maybe it makes sense for those RISCs where the registers don't have any other names and the official documentation also does it like that, but x86 isn't like that, so stop trying to make it look that way.
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Anonymous2012-08-28 3:18
8a
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Anonymous2012-08-28 14:22
x86 is shit. Buy a Lemote and join MIPS master race.
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Anonymous2012-08-28 14:27
>>45
Shut the fuck up, you fucking retarded piece of shit.
RISC was never destined for anything other than Smartphones.
>>46
x86 wasn't destined for anything other than calculators and embedded terminals. Secure boot is perfect for x86. That way you'll never be afraid of your calculator giving you a wrong answer — unless it's a Pentium!
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Anonymous2012-08-29 0:56
>>43
Well yes, the real problem is the manuals. (Am I the only one who distinctly prefers AMD's manuals to Intels? Yes, I know the mnemonics in both are the same...)
I'm guessing that having 1:1 correspondence between mnemonics and opcodes would make the assembler's job simpler, but I've not written one myself.
>>49
The first x86, the 8086, is 3 (or 4 if you count the 8085 as being separate from the 8080) families ahead of the 4004 and 8008 and quite different from them.
>>50
AMD is too secretive. Try finding the socket AM3 pinout for example. Intel lets you know what every single one of the 2011 pads on the latest CPUs are for. The quality of Intel's manuals (# of typos) went noticeably downhill when they switched to the "new" style of font/logo and probably new people, a few years ago. I still use the ones from P4 days.
I'm guessing that having 1:1 correspondence between mnemonics and opcodes would make the assembler's job simpler, but I've not written one myself.
It would, but at the expense of being able to write Asm easily.
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Anonymous2012-08-30 6:21
>>51 AMD is too secretive. Try finding the socket AM3 pinout for example. Intel lets you know what every single one of the 2011 pads on the latest CPUs are for.
AMD seriously doesn't freely publish the pinout diagrams for its chips? And I thought Intel set the industry standard for paranoia...
The quality of Intel's manuals (# of typos) went noticeably downhill when they switched to the "new" style of font/logo and probably new people, a few years ago.
You've not known hell until you've seen the ``manuals'' for their graphics controllers. Holy fucking Christ on a crutch are they bad. No idea whether AMD's are any better.
>> I'm guessing that having 1:1 correspondence between mnemonics and opcodes would make the assembler's job simpler, but I've not written one myself. It would, but at the expense of being able to write Asm easily.
Unless your brain happens to work the same way as the assembler, of course. Being brought up on RISC first probably makes a difference for me.