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World's Thickest Book

Name: Anonymous 2013-01-30 23:10

Name: Cudder !MhMRSATORI!fR8duoqGZdD/iE5 2013-02-10 6:09

>>79,81
Good to see someone else here with knowledge of how hardware works...

80386 1.5um process die. 275,000 transistors in 104mm2. Density of approximately 2.6K transistors/mm2.

8-core Xeon E5 (Sandy Bridge) 32nm process die. 2,270,000,000 transistors in 434mm2. Density of approximately 5.23M transistors/mm2.

The amount of chip area needed for an entire 386 in the 32nm process would be 0.05mm2, or about 0.23mm on a side. The Xeon E5 die is around 21mm on a side. That's an entire working 386, complete with all the "legacy" instructions and everything, and it takes only 0.01% of the die space in a modern processor, or around the same size as 4 bond pads.

Here's a picture to put things into perspective:
http://img89.imageshack.us/img89/3897/compareqvu.jpg

That tiny square, a miniscule bit compared to the entire die which looks enormous in comparison; until you realise the die itself is only ~21mm square.

Would they remove that just for the sake of academic "elegance", at the HUGE cost of losing backwards compatibility?

Now Intel has no choice but to admit that ARM is cannibalizing their market from below
Intel actually has an ARM license. They don't intend to use it.

Medfield looks pretty good for a first try. Intel never cared much about low power, they were after performance first. But now that they're trying, it'll be interesting to see what happens. Having an entire PC-compatible smartphone would be awesome. ARM is only compatible at the ISA level, everything else is different (and difficult to find info on) between the SoCs.

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