considering that we can keep the processor simple and elegant
That's worth nothing in the real world, except maybe a very very tiny amount of space on silicon (taken up mostly by cache anyway). Which is why even ARM and MIPS are adding more instructions and becoming CISCy as time goes on. The future is massive parallelism at core and instruction level (i.e. CISC-like), not sky-high clockspeeds (RISC academic's philosophy).