RISC

/prog/, I'm working on a RISC instruction set that is more RISC than any RISC out there. I've devised an instruction format, plus fifteen core instructions that should suffice for any programming out there. The instruction format, instruction forms, and instructions can be found here:

http://jsbin.com/ekuwap

Any comments or suggestions?

>>78
If you access memory that doesn't exist you would just read the value from a floating databus (FFs if there's termination/pullups, other values are possible but it doesn't matter here) and try to write it to the same nonexistent location, so nothing actually happened.
This is usually but isn't always true because of memory-mapped I/O. Sometimes reading from a memory location and writing a value back (even the same value) has side-effects. Especially since that's probably how this CPU will do I/O since there are no IN/OUT port instructions. I know that on the SNES there are some memory-mapped I/O ports that are "open bus" on read but valid on write or that have destructive reads. An m instruction with the same register on those is definitely not a NOP!