RISC

/prog/, I'm working on a RISC instruction set that is more RISC than any RISC out there. I've devised an instruction format, plus fifteen core instructions that should suffice for any programming out there. The instruction format, instruction forms, and instructions can be found here:

http://jsbin.com/ekuwap

Any comments or suggestions?

>>75
Both the src and the dest for AND and OR are registers, right? As I'm sure you know, ANDing or ORing a number with itself produces that same number, which is why so many RISCs use them as NOPs or (three-operand versions) as register-register moves.