verilog vs vhdl

looking to see if you champions have any opinions on either.
i'm most likely going to teach myself verilog because i'm more familiar with c style syntax and my professor recommended it.

inb4 verilog is the future or learn both

also if you're up for it, gimme any tips you got.

Learn to do it by hand first. This includes learning an assembly language. Your colleagues will hate you if you treat Verilog like Java without any understanding of the underlying mechanisms.

Never use a language until you know what it's doing. The same holds true for C, as you probably don't know.