Question about cache

This question is about a direct mapped cache in particular and is for one of my classes. I don't want an answer, I want a clarification. The question states that I am working on a machine with a 64KB directmapped cache with 4-byte lines. Then the question gives me two different for-loops for a 2 dimensional array of structs of 4 characters, and asks me what percentage of writes will miss. One of the loops is done in row major order and the other is done column major. My main question is, do the two loops have the same miss rate because the line sizes are so small?

lisp

>>1
I don't know. What do you think?

That question is irrelevant. All modern caches are n-way set associative (with n typically 4 or more, up to 16) and the line size is vastly greater (typically 32 or more recently 64, up to 128).

To answer your question, the information you've posted is not nearly enough. However, it could go either way - it's very likely the miss rates will differ.

shit was so cache

>>4
okay I have a better question. In the context of this problem is the block size the same as the line size?

Don't change these.

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