Odd cache mappings

I don't expect you faggots to have a clue but I'll try anyway.

Some Core2 processors include non-power-of-two amounts of cache, such as 3MB or 6MB.

How is this cache mapped to addresses?

>>1
One by one. What do you mean? My system has 32-bit addresses. I don't have 4 gigs of RAM. YET MY COMPUTER RUNS