VHDL

Lets see some VHDL programming:

--File: enc83
--Author ANONYMOUS
--Date: Feb 15, 2007
--Provides: VHDL for a 8-3 encoder
entity ENC83 is port(
    I7 : in bit;
    I6 : in bit;
    I5 : in bit;
    I4 : in bit;
    I3 : in bit;
    I2 : in bit;
    I1 : in bit;
    I0 : in bit;
    Y2 : out bit;
    Y1 : out bit;
    Y0 : out bit
);
end entity ENC83;

--Achitecture description
-- V0 = (I0)
-- V1 = (I1)
-- V2 = (I2)
-- V3 = (I3)
-- V4 = (I4)
-- V5 = (I5)
-- V6 = (I6)
-- V7 = (I7)
-- Y0 = (1,3,5,7)
-- Y1 = (2,3,6,7)
-- Y2 = (4,5,6,7)
architecture dataflow of ENC83 is

    signal V: bit_vector (7 downto 0);

begin

    V(7) <= I7;
    V(6) <= not I7 and I6;
    V(5) <= not I7 and not I6 and I5;
    V(4) <= not I7 and not I6 and not I5 and I4;
    V(3) <= not I7 and not I6 and not I5 and not I4 and I3;
    V(2) <= not I7 and not I6 and not I5 and not I4 and not I3 and I2;
    V(1) <= not I7 and not I6 and not I5 and not I4 and not I3 and not I2 and I1;
    V(0) <= not I7 and not I6 and not I5 and not I4 and not I3 and not I2 and not I1 and I0;
   
    Y0 <= V(1) or V(3) or V(5) or V(7);
    Y1 <= V(2) or V(3) or V(6) or V(7);
    Y2 <= V(4) or V(5) or V(6) or V(7);

end architecture dataflow;
   

Verilog > VHDL

Yeah, let's not. You'd just get B7 for flooding.

>>2
Verilog is for retards

Test

>>5
ANTI SAGE


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity Register4 is
    Port ( D : in  STD_LOGIC_VECTOR (3 downto 0);
           Q : out  STD_LOGIC_VECTOR (3 downto 0);
           Clock, Enable, Reset : in  STD_LOGIC );
end Register4;

architecture Behavioral of Register4 is
begin
    process(Clock, Reset)
    begin
        if (Reset = '0') then
            Q <= "0000";
        elsif rising_edge(Clock) then
            if (Enable = '1') then
                Q <= D;
            end if;
        end if;
    end process;
end Behavioral;

VHDL is an acronym for VHSIC HDL, which in turn is an acronym for Very High Speed Integrated Circuit Hardware Description Language.

That gives an acronym compression ratio of 4:64, or 1:16, which is awesome!

The Guidans rejected him as a treacherous   scoundrel The Experts   though despondent at   the loss of   their Saviour are   confident that The   length of the   software industry these   days and what   you thought was   put into everything   to make sure   you include ICE   and ICEbreakers Otherwise.

<-- check em dubz

13 Name: tray 2012-03-15 16:14

hey ya all, guten tag!