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RISC VS CISC

Name: Anonymous 2012-01-16 0:02

Why are modern cpus still using cisc at the top layer?

Name: Anonymous 2012-01-16 1:23

>>1
First of all, Yentl x86 is an insult to the word CISC. Many of the most influential computer architectures of all time: System/360, PDP-11, VAX, PDP-10, and others are very well-designed CISCs that are much nicer to program for than the disgusting Yentl Architecture. Most of these have such regular instruction sets that each hex/octal opcode corresponds exactly to the same operation, register, or addressing mode, no matter what the instruction is. Second of all, Jews cannot innovate like Goyim can. Even Yentl's original 8008 was a copy of the Datapoint 2200 terminal CPU designed by the (Goyish) Computer Terminal Corporation.
>>2
That's what Yentl wants you to think. In fact, all of the prefix bytes and extended opcodes make any instruction that wasn't designed for compatibility with 8-bit processors much longer than it needs to be. SSE instructions are at least four bytes and are two-address. All AltiVec instructions are only four bytes and are three-address. What may require three instructions (at least twelve bytes) of SSE could be done with one instruction (four bytes) of AltiVec.

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