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RISC VS CISC

Name: Anonymous 2012-01-16 0:02

Why are modern cpus still using cisc at the top layer?

Name: Anonymous 2012-01-19 0:14

>>53
Intel doesn't (can't) fix all of their serious bugs. This is from 2007, but these bugs have no software work-arounds. What are some of these MIPS SoC bugs for comparison?
http://undeadly.org/cgi?action=article&sid=20070628134608
Note that some errata like AI65, AI79, AI43, AI39, AI90, AI99 scare the hell out of us. Some of these are things that cannot be fixed in running code, and some are things that every operating system will do until about mid-2008, because that is how the MMU has always been managed on all generations of Intel/AMD/whoeverelse hardware. Now Intel is telling people to manage the MMU's TLB flushes in a new and different way. Yet even if we do so, some of the errata listed are unaffected by doing so.

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