Branch Misses

How bad do branch misses hurt a programs performance? In C and Java?

for example how big of an impact would :


int shitinanus()
{
    int val = getanus();
    if(val != 0)
        return ANALTONIGHT;
    return ALONETONIGHT;
}

be knowing that val will most likely be 0 99% of the time compared to the below function


int shitinanus()
{
    int val = getanus();
    if(val == 0)
        return ALONETONIGHT;
    return ANALTONIGHT;
}

>>130,131
It's a benchmark of total throughput per clock. "MIPS" is not a good term for this, they should call it 7marks or something like that. If you read the fine print at the bottom you'll see that the Intel Core 2 is taken as a reference at 1MIPS/MHz/thread. Then more efficient than it would be >1, less would be <1.

The best RISC one there is the POWER7 at 0.76 MIPS/MHz/thread, and it's not exactly power (lol) efficient either -- 200W TDP!

I've been saying this for years: CISC is going to have IPC and total throughput advantage. You can pump the RISCs to go really fast but then you're limited by the less dense code (more cache misses) and physical limits like power dissipation. In comparison a CISC won't have as many instructions and this makes for less cache misses and lower memory bandwidth, sort of like having compressed instructions in memory and decompressing them in the on-die decoder. Intel still has a lot of improvement they can do with x86 microarchitecture optimization like moving more instructions out of microcode, they just haven't seen the need to do it yet. But as memory bandwidth becomes the limiting factor for throughput it is clear that CISC-like designs are coming back and going to be the future.