RISC

/prog/, I'm working on a RISC instruction set that is more RISC than any RISC out there. I've devised an instruction format, plus fifteen core instructions that should suffice for any programming out there. The instruction format, instruction forms, and instructions can be found here:

http://jsbin.com/ekuwap

Any comments or suggestions?

>>83
If this CPU didn't have multiple-bit shifts, this would be a good idea (the IBM 5110 can do any 8-bit rotate in 3 instructions by doing this), but it can already shift by any number of bits in one instruction, so a hardware implementation would use a barrel shifter. In that case rotate can use the same format as shifts and then it could rotate by any number of bits in one instruction. It wouldn't make sense to use multiple rotate instructions in an architecture that already needs a barrel shifter and can already do them in one cycle.