RISC

/prog/, I'm working on a RISC instruction set that is more RISC than any RISC out there. I've devised an instruction format, plus fifteen core instructions that should suffice for any programming out there. The instruction format, instruction forms, and instructions can be found here:

http://jsbin.com/ekuwap

Any comments or suggestions?

>>76
That reminds me of this:

4.1.1 REGISTER/IMMEDIATE OPERAND FIELD

000 8-bit immediate value follows instruction (#xx)
001 16-bit immediate value follows instruction (#xxxx)
010 32-bit immediate value follows instruction (#xxxxxxxx)
1nn memory operand pointed to by D0 through D4 (@D0-@D4)

4.1.2 FLEXIBLE OPERAND FIELD

000nn memory operand pointed to by D0 through D4 (@D0-@D4)
001nn 32-bit registers D0[W1:W0] through D4[W7:W6] (D0-D4)
01nnn 16-bit registers W0[B1:B0] through W7[B15:B14] (W0-W7)
1nnnn 8-bit registers B0 through B15 (B0-B15)