RISC

/prog/, I'm working on a RISC instruction set that is more RISC than any RISC out there. I've devised an instruction format, plus fifteen core instructions that should suffice for any programming out there. The instruction format, instruction forms, and instructions can be found here:

http://jsbin.com/ekuwap

Any comments or suggestions?

>>53
The address field is a register reference. There are 32 registers (which is why each register reference takes 5 bits). Each register can hold 32, 64, 128, ... bits depending on the CPU's bit mode.