RISC

/prog/, I'm working on a RISC instruction set that is more RISC than any RISC out there. I've devised an instruction format, plus fifteen core instructions that should suffice for any programming out there. The instruction format, instruction forms, and instructions can be found here:

http://jsbin.com/ekuwap

Any comments or suggestions?

>>102
i7 still uses RISC representations internally, right?
To counter a earlier argument you made, the RISC philosophy is still very applicable when it comes to doing more per clock cycle.
Fancy superscalar tricks like out-of-order execution require very efficient decoding, and IIRC Intel's processor does all of that after the conversion stage.