>>3
SMP with 32 cores? How the f
uck is cache coherency going to scale on that? Didn't the Larrabee project fail precisely because of SMP scaling badly to large core counts?
On another note, I don't
actually give a fuck about this since my code will probably never run on such a machine (if it ever ends up existing), since Sony is probably going to lock it up like hell using hardware crypto and other such evil goodies. Oh well. I hope they won't try escaping taxes this time by declaring it as a ``general purpose'' computer; that would be adding insult to injury.
>>4
I love you.