>>21
The only reason errors are much less frequent in EE is because testing is embedded very deeply into hardware design practices. The cost of failure is simply unacceptable for some projects (like ASICs), so everything is usually very rigurously tested using test benches and other mechanisms. Considerably much less than software engineers do.
Overall, languages like VHDL and Verilog appear high-level, but they tend to be quite low-level, in the way one designs state machines manually and how various other things you take for granted when doing normal programming have to be done by in a much more manual (and modular) manner. There are also complex synchornisation issues and other problems you have to deal when designing for a physical platform.
Things could be made much more simpler by using some higher-level language like a subset of C or certain functional languages which eventually compile to VHDL or Verilog or portable or non-portable (technology specific) schematics, but can you really afford the bloat in time and space that such languages will bring with them? Hardware costs money, and the bigger and slower your hardware is, the more you have to pay, especially if it's something mass manufactured.
Software on the other hand is not limited as much as hardware: RAM tends to be cheap, space is plentiful, CPUs are reasonably fast. It only becomes an issue when you have to buy large server farms to run your software on each node. And since it's software, bugs are usually less important as software can be easily upgraded.