Some models use a fixed-latency algorithm, some use a variable one. You are NOT going to beat the latter with anything. The trend is to go variable for the performance line and fixed for the mobile/lower-power. Clearly CISC superiority.
And FYI everyone doing the >>=2 thing: first of all this isn't a floating point sqrt, and secondly executing just that one statement alone 32 times is going to take at least 32 cycles. Now factor in the cost of doing the test + branch and everything inside the loop body... can't beat microcode.
http://en.wikipedia.org/wiki/List_of_Intel_codenames Intel has historically named integrated circuit (IC) development projects after geographical names of towns, rivers or mountains near the location of the Intel facility responsible for the IC. Many of these are in the American West, particularly in Oregon (where most of Intel's CPU projects are designed; see famous codenames). As Intel's development activities have expanded, this nomenclature has expanded to Israel and India... Wellsburg Chipset PCH for two- and four-socket servers based on the Grantley-EP platform. Successor to Patsburg. Reference unknown. 2012
Gesher CPU architecture A processor microarchitecture, the successor to Nehalem. Renamed to Sandy Bridge after it was discovered that Gesher is also the name of a political party in Israel.[19] The Hebrew word for 'bridge'. 2011
Gesher (political party) - Wikipedia, the free encyclopedia
en.wikipedia.org/wiki/Gesher_(political_party)
Gesher (Hebrew: גֶּשֶׁר, lit. Bridge), officially Gesher - National Social Movement (Hebrew: גשר - תנועה חברתית לאומית, Gesher - Teno'a Hevratit Le'umit) was a ...?