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Core 2 Duo

Name: Anonymous 2007-06-28 10:20 ID:wrWqgxab

I'm scared.

- A Thermal Interrupt is Not Generated when the Current Temperature is Invalid
- REP Store Instructions in a Specific Situation may cause the Processor to Hang
- Concurrent Multi-processor Writes to Non-dirty Page May Result in Unpredictable Behavior
- Cache Data Access Request from One Core Hitting a Modified Line in the L1 Data Cache of the Other Core May Cause Unpredictable System Behavior
- Invalid Instructions May Lead to Unexpected Behavior
- FXSAVE/FXRSTOR Instructions which Store to the End of the Segment and Cause a Wrap to a Misaligned Base Address (Alignment <= 0x10h) May Cause FPU Instruction or Operand Pointer Corruption
- Upper 32 Bits of the FPU Data (Operand) Pointer in the FXSAVE Memory Image May Be Unexpectedly All 1's after FXSAVE
- Writing Shared Unaligned Data that Crosses a Cache Line without Proper Semaphores or Barriers May Expose a Memory Ordering Issue

More info courtesy of Theo here: http://marc.info/?l=openbsd-misc&m=118296441702631

Name: Anonymous 2007-07-01 15:12 ID:FSD8AUQe

Meh. The MMU "bug" is just something about PTEs or other structures being fetched from the L2 cache, so they need to be flushed all the way to RAM for changes to take effect (since immediately after change, the changed version is only in the L1 cache). Not really a big deal, far as I can tell, since that behaviour has never been specified by the x86 MMU documentation; not that given by Intel anyhow.

The string primitive things could be more serious though.

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